R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 138

IC R8C MCU FLASH 8K 20SSOP

R5F21162SP#U0

Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets

Specifications of R5F21162SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
13.3.2
Table 13.12
NOTES:
Count Source
Count Operation
Count Start Condition
Counter Stop Condition
Waveform Output Start
Condition
Waveform Output Stop
Condition
Interrupt Request
Generation Timing
INT3/TCIN Pin Function
P1_0 to P1_2 Pins and
P3_0 to P3_2 Pins
Function
Counter Value Reset
Timing
Read from Timer
Write to Timer
Select Function
1. When the corresponding port data is “1”, the waveform is output depending on the setting of the
2. Access the TC, TM0, and TM1 registers in 16-bit units.
Output compare mode is mode to generate an interrupt request when the value of the TC register
matches the value of the TM0 or TM1 register. Table 13.12 shows Specification of Output Compare
Mode. Figure 13.31 shows an Operating Example in Output Compare Mode.
registers TCC1 and TCOUT. When the corresponding port data is “0”, the fixed level is output (refer
to Figure 13.25 Block Diagram of CMP Waveform Output Unit).
Jan 19, 2006
Output Compare Mode
Item
Specification of Output Compare Mode
(1)
(1)
Page 123 of 254
f1, f8, f32, fRING-fast
• Increment
• The value in the TC register is set to “0000h” when count stops
The TCC00 bit in the TCC0 register is set to “1” (count starts)
The TCC00 bit in the TCC0 register is set to “0” (count stops)
The TCOUT0 to TCOUT5 bits in the TCOUT register is set to “1” (enables
CMP output).
The TCOUT0 to TCOUT5 bits in the TCOUT register is set to “0” (disables
CMP output).
• When a match occurs in the compare circuit 0 [compare 0 interrupt]
• When a match occurs in the compare circuit 1 [compare 1 interrupt]
• When Time C overflows [Timer C interrupt]
Programmable I/O port or INT3 interrupt input
Programmable I/O port or CMP output
When the TCC00 bit in the TCC0 register is set to “0” (count stops)
• The value in the compare register can be read out by reading the TM0 and
• The count value can be read out by reading the TC register.
• Write to the TC register is disabled.
• The values written to the TM0 and TM1 registers are stored in the compare
• Timer C counter reload select function
• The TCC14 to TCC15 bits in the TCC1 register can select the output level
• The TCOUT6 to TCOUT7 bits in the TCOUT register can select whether
TM1 registers.
register at the following timings:
when the compare circuit 0 matches. The TCC16 to TCC17 bits in the
TCC1 register can select the output level when the compare circuit 1
matches.
the output is reversed or not.
- When the TM0 and TM1 registers are written if the TCC00 bit is set to “0”
- When the counter overflows if the TCC00 bit is set to “1” (during
- When the compare 1 matches a counter if the TCC00 bit is set to “1” and
The TCC12 bit in the TCC1 register can select whether the counter value
in the TC register is set to “0000h” when the compare circuit 1 matches or
not.
(count stops)
counting) and the TCC12 bit in the TCC1 register is set to “0” (free-run)
the TCC12 bit is set to “1” (set the TC register to “0000h” when the
compare 1 matches)
(2)
Specification
(1)
13. Timers

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