R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 47

IC R8C MCU FLASH 8K 20SSOP

R5F21162SP#U0

Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets

Specifications of R5F21162SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
6.2
Figure 6.7
Table 6.2
NOTES:
Table 6.2 lists the Setting Procedure of Voltage Monitor 1 Reset Associated Bit and Figure 6.7 shows
the Operating Example of Voltage Monitor 1 Reset. When using the voltage monitor 1 reset to exit stop
mode, set the VW1C1 bit in the VW1C register to “1” (digital filter disabled).
1. When the VW1C0 bit is set to “0” (disabled), procedures 3, 4 and 5 can be executed simultaneously
Procedure
When the VW1C1 bit is set
to “0” (digital filter enabled)
When the VW1C1 bit is set
to “1” (digital filter disabled)
and the VW1C7 bit is set
to “1”
(with 1 instruction).
3
4
5
Voltage Monitor 1 Reset
1
2
6
7
8
9
(1)
(1)
(1)
VW1C1 and VW1C7 : Bits in VW1C Register
Jan 19, 2006
Setting Procedure of Voltage Monitor 1 Reset Associated Bit
Operating Example of Voltage Monitor 1 Reset
Set the VCA26 bit in the VCA2 register to “1” (voltage detection 1 circuit enabled)
Wait for td(E-A)
Select the sampling clock of the digital filter
by the VW1F0 to VW1F1 bits in the VW1C
register
Set the VW1C1 bit in the VW1C register to
“0” (digital filter enabled).
Set the VW1C6 bit in the VW1C register to “1” (voltage monitor 1 reset mode)
Set the VW1C2 bit in the VW1C register to “0”
Set the CM14 bit in the CM1 register to “0”
(low-speed on-chip oscillator on)
Wait for the sampling clock of the digital
filter x 4 cycles
Set the VW1C0 bit in the VW1C register to “1” (enables voltage monitor 1 reset)
Internal Reset Signal
Internal Reset Signal
The above applies to the following conditions.
• VCA26 bit in VCA2 register = 1 (voltage detection 1 circuit enabled)
• VW1C0 bit in VW1C register = 1 (enables voltage monitor 1 reset )
• VW1C6 bit in VW1C register = 1 (voltage monitor 1 reset mode)
When the internal reset signal is held “L”, the pins, CPU and SFR are reset.
The internal reset signal is changed from “L” to “H”, the program is executed beginning with the address indicated by the
reset vector.
Refer to 4. Special Function Register (SFR) for the SFR status after reset.
(Typ. 2.85V)
Page 32 of 254
When Using Digital Filter
Vdet1
VCC
Sampling Clock of
Digital Filter x 4 Cycles
Set the VW1C7 bit in the VW1C register to
“1”
Set the VW1C1 bit in the VW1C register to
“1” (digital filter disabled)
− (no wait time)
When Not Using Digital Filter
6. Voltage Detection Circuit
fRING-S
fRING-S
1
1
x 32
x 32

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