R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 112

IC R8C MCU FLASH 8K 20SSOP

R5F21162SP#U0

Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets

Specifications of R5F21162SP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 13.10
Conditions: A period from one rising edge to the next rising edge of measurement pulse is measured (R0EDG=0)
NOTES :
1. The contents of the read-out buffer can be read when the TX register is read in pulse period measurement mode.
2. After an active edge of measurement pulse is input, the TXEDG bit in the TXMR register is set to “1” (active edge found)
3. The TX register should be read before the next active edge is input after the TXEDG bit is set to “1” (active edge found).
4. When set to “0” by program, use a MOV instruction to write “0” to the TXEDG in the TXMR register. At the same time,
5. When set to “0” by program, use a MOV instruction to write “0” to the TXUND in the TXMR register. At the same time,
6. The TXUND and TXEDG bits are both set to “1” if the timer underflows and reloads on an active edge simultaneously.
7. If the CNTR0 active edge is input, when the prescaler X underflow signal is “H” level, its count value is the one of the
TXS Bit in TXMR
Register
IR Bit in INT1IC
Register
CNTR0i Pin Input
Contents of Timer X
Contents of
Read-Out Buffer1
TXEDG Bit in
TXMR Register
TXUND Bit in
TXMR Register
IR Bit in
TXIC Register
Underflow Signal of
Prescaler X
when the prescale X underflows for the second time.
The contents in the read-out buffer is retained until the TX register is read. If the TX register is not read before the next
active edge is input, the measured result of the previous period is retained.
write “1” to the TXUND bit.
write “1” to the TXEDG bit.
In this case, the validity of the TXUND bit should be determined by the contents of the read-out buffer.
read buffer. If “L” level, the following count value is the one of the read buffer.
Jan 19, 2006
i=0 to 1
with the default value of the TX register as 0Fh.
Operating Example in Pulse Period Measurement Mode
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
Page 97 of 254
Starts
counting
Set to “1” by program
0Fh
0Fh
0Eh
0Fh 0Eh 0Dh 0Ch 0Bh 0Ah 09h 08h 0Fh 0Eh 0Dh
(2)
(7)
Retained
Set to “0” when interrupt request is acknowledged, or set by program
Timer X
reloads
0Eh
Set to “0” when interrupt request is acknowledged, or set by program
Set to “0” by program
0Ah
Timer X read
(4)
09h
Retained
(3)
(2)
08h
Timer X
reloads
(7)
0Dh
Timer X read
Set to “0” by program
(3)
01h 00h 0Fh 0Eh
01h
00h
(5)
(6)
0Fh 0Eh
Timer X
reloads
13. Timers

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