R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 66
![IC R8C MCU FLASH 8K 20SSOP](/photos/12/35/123577/r5f21162sp_u0_sml.jpg)
R5F21162SP#U0
Manufacturer Part Number
R5F21162SP#U0
Description
IC R8C MCU FLASH 8K 20SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/16r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21173DSPU0.pdf
(40 pages)
3.R5F21173DSPU0.pdf
(281 pages)
Specifications of R5F21162SP#U0
Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
20-SSOP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 66 of 281
- Download datasheet (4Mb)
R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
9.4.3
Table 9.4
Key Input Interrupt
INT0 to INT1 Interrupts
INT3 Interrupt
Timer X Interrupt
Serial Interface Interrupt
Voltage Monitor 2 Interrupt
9.4.3.1
9.4.3.2
9.4.3.3
Since the oscillator circuits stop in stop mode, the CPU clock and peripheral function clock stop and
the CPU and peripheral functions operated by these clocks stop operating. The least power required
to operate the microcomputer is in stop mode. If the voltage applied to the VCC pin is VRAM or
more, the internal RAM is maintained.
The peripheral functions operated by external signals maintain operating. Table 9.4 lists Interrupts to
Exit Stop Mode and Usage Conditions.
The microcomputer enters stop mode by setting the CM10 bit in the CM1 register to “1” (all clocks
stop). At the same time, the CM06 bit in the CM0 register is set to “1” (divide-by-8 mode) and the
CM15 bit in the CM10 register is set to “1” (drive capacity HIGH of main clock oscillator circuit).
When using stop mode, set the OCD1 to OCD0 bits to “00b” (oscillation stop detection function
disabled) before entering stop mode.
The status before entering stop mode is maintained.
However, when the CM13 bit in the CM1 register is set to “1” (XIN-XOUT pins), the XOUT(P4_7) pin
is held “H”. When the CM13 bit is set to “0” (input port P4_6 and P4_7), the P4_7(XOUT) is held in
input status.
The microcomputer exits stop mode by a hardware reset or peripheral function interrupt.
When using a hardware reset to exit stop mode, set the ILVL2 to ILVL0 bits for the peripheral function
interrupts to “000b” (disables interrupts) before setting the CM10 bit to “1”.
When using a peripheral function interrupt to exit stop mode, set up the following before setting the
CM10 bit to “1”.
The CPU clock, when exiting stop mode by a peripheral function interrupt, is the divide-by-8 of the
clock which is used before entering stop mode.
(1) Set the interrupt priority level to the ILVL2 to ILVL0 bits of the peripheral function interrupts to
(2) Set the I flag to “1”.
(3) Operates the peripheral function to use for exiting stop mode.
Jan 19, 2006
Stop Mode
use for exiting stop mode. Set the ILVL2 to ILVL0 bits of the peripheral function interrupts not
to use for exiting stop mode to “000b” (disables interrupt).
When an interrupt request is generated and the CPU clock supply is started if exiting by the
peripheral function interrupt, an interrupt sequence is executed.
Entering Stop Mode
Pin Status in Stop Mode
Exiting Stop Mode
Interrupts to Exit Stop Mode and Usage Conditions
Interrupt
Page 51 of 254
No filter. Interrupt request is generated at INT3 input. (TCC06 bit
−
INT0 is usable if there is no filter
in TCC0 register is set to “1”)
When external pulse is counted in event counter mode
When external clock is selected
Usable in digital filter disabled mode (VW2C1 bit in VW2C register
is set to “1”)
Usage Conditions
9. Clock Generation Circuit
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