R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 163

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 15.8
Slave Address Register
IIC Bus Transmit Data Register
IIC Bus Receive Data Register
IIC Bus Shift Register
b7 b6
b7 b6 b5 b4 b3 b2 b1
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4
1.
1.
1.
b5
Refer to 20.6.1 Access of Registers Associated w ith IIC for the access of registers associated w ith IIC.
Refer to 20.6.1 Access of Registers Associated w ith IIC for the access of registers associated w ith IIC.
Refer to 20.6.1 Access of Registers Associated w ith IIC for the access of registers associated w ith IIC.
Jan 19, 2006
b4
b3 b2
b3 b2 b1 b0
SAR, ICDRT, ICDRR and ICDRS Register
b1
b0
b0
Store transmit data
When detecting that the ICDRS register is empty, the stored transmit data is transferred to the
ICDRS register and the starts transmit data.
When the next transmit data is w ritten to the ICDRT register during transmitting the data of the
ICDRS register, continuous transmit is enabled. When the MLS bit in the ICMR register is set to
“1” (data transferred by LSB-first) and after the data is w ritten to the ICDRT register, the MSB
and LSB inverted data is read.
Store receive data
When the ICDRS register receives 1-byte data, the receive data is transferred to the ICDRR
register and the next receive is enabled.
This register is a register that is used to transmit and receive data.
The transmit data is transferred from the ICRDT to ICDRS registers and data is transmitted
from the SDA pin w hen transmitting.
When 1-byte data is received, data is transferred from the ICDRS to ICDRR registers w hen
receiving.
Bit Symbol
Symbol
Symbol
Symbol
Symbol
ICDRR
ICDRS
SVA0
SVA1
SVA2
SVA3
SVA4
SVA5
SVA6
ICDRT
SAR
(1)
Page 148 of 254
FS
(1)
(1)
Format Select Bit
Slave Address 6 to 0
Address
Bit Name
00BDh
Address
Address
00BEh
00BFh
Function
Function
Function
0 : I
1 : Clock synchronous serial format
Set the different address from the other slave
devices w hich are connected to the I
When the 7 high-order bits of the first frame
transmitted after the starting condition match
the SVA0 to SVA6 bits in slave mode of the I
bus format, the microcomputer operates as a
slave device.
2
C bus format
After Reset
Function
After Reset
After Reset
00h
FFh
FFh
15. I
2
C bus interface (IIC)
2
C bus.
2
C
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
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