R5F21162SP#U0 Renesas Electronics America, R5F21162SP#U0 Datasheet - Page 219

• Manufacturer Part Number: R5F21162SP#U0
• Description: IC R8C MCU FLASH 8K 20SSOP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/16r

Specifications of R5F21162SP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SIO, UART/USART
• Peripherals: LED, POR, Voltage Detect, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/16 Group, R8C/17 Group
Rev.2.10
REJ09B0169-0210
Figure 18.6
Flash Memory Control Register 4
Flash Memory Control Register 1
b7 b6 b5 b4
NOTES :
b7 b6 b5 b4
NOTES :
0
1
1.
2.
1.
2.
3.
0 0
When setting this bit to “1”, set to “1” immediately after setting it first to “0” w hile the FMR01 bit is set to “1” (CPU
rew rite mode enable) . Do not generate an interrupt betw een settting the bit to “0” and setting it to “1”.
This bit is set to “0” by setting the FMR01 bit to “0” (CPU rew rite mode disabled).
When the FMR01 bit is set to “1” (CPU rew rite mode enabled), the FMR15 and FMR16 bits can be w ritten.
When setting this bit to “0”, set to “0” immediately after setting it first to “1”.
When setting this bit to “1”, set it to “1”.
When setting this bit to “1”, set to “1” immediately after setting it first to “0”. Do not generate an interrupt betw een
setting the bit to “0” and setting it to “1”.
This bit is enabled w hen the FMR40 bit is set to “1” (enable) and this bit can be w ritten during the period betw een
issuing an erase command and completing an erase (This bit is set to “0” during the periods other than above.)
In EW0 mode, this can be set to “0” and “1” by a program.
In EW1 mode, this bit is automatically set to “1” if a maskable interrupt is generated during an erase
operation w hile the FMR40 bit is set to “1”. Do not set this bit to “1” by a program (“0” can be w ritten).
Jan 19, 2006
0
b3 b2
b3 b2
0
0
0
0
FMR1 and FMR4 Registers
b1 b0
b1 b0
Bit Symbol
Bit Symbol
(b5-b2)
(b4-b2)
Symbol
FMR15
FMR16
Symbol
FMR46
FMR40
FMR41
FMR11
FMR4
FMR1
(b7)
(b0)
(b7)
Page 204 of 254
—
—
—
—
—
Erase-Suspend Function
Enable Bit
Erase-Suspend Request
Bit
Reserved Bit
Read Status Flag
Reserved Bit
Reserved Bit
EW1 Mode Select Bit
Reserved Bit
Block 0 Rew rite Disable Bit
Block 1 Rew rite Disable Bit
Reserved Bit
(2)
(1)
Address
Bit Name
01B3h
Address
Bit Name
01B5h
(1, 2)
(2,3)
(2,3)
0 : Disable
1 : Enable
0 : Erase restart
1 : Erase-suspend request
Set to “0”
0 : Disables reading
1 : Enables reading
Set to “0”
When read, its content is indeterminate.
0 : EW0 mode
1 : EW1 mode
Set to “0”
0 : Enables rew rite
1 : Disables rew rite
0 : Enables rew rite
1 : Disables rew rite
Set to “1”
After Reset
01000000b
Function
After Reset
1000000Xb
Function
18. Flash Memory Version
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO