DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 71
DF2266TF13V
Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2266TF20V.pdf
(712 pages)
Specifications of DF2266TF13V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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• Stack Structure
Note: * Supported only by the H8S/2268 Group.
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions
uses an 8-bit absolute address included in the instruction code to specify a memory operand
that contains a branch address. In advanced mode, the operand is a 32-bit longword operand,
providing a 32-bit branch address. The upper 8 bits of these 32 bits is a reserved area that is
regarded as H'00. Branch addresses can be stored in the area from H'00000000 to H'000000FF.
Note that the first part of this range is also the exception vector table.
In advanced mode, when the program counter (PC) is pushed onto the stack in a subroutine
call, and the PC, condition-code register (CCR), and extended control register (EXR * ) are
pushed onto the stack in exception handling, they are stored as shown in figure 2.4. When
EXR * is invalid, it is not pushed onto the stack. For details, see section 4, Exception Handling.
SP
Notes: 1. When EXR is not used it is not stored on the stack.
2. SP when EXR is not used (The H8S/2264 Group SP always points here).
3. Ignored when returning.
4. Supported only by the H8S/2268 Group.
(a) Subroutine Branch
Figure 2.4 Stack Structure in Advanced Mode
Reserved
(24 bits)
PC
(SP
SP
*
2
Rev. 5.00 Sep. 01, 2009 Page 19 of 656
)
(b) Exception Handling
(24 bits)
EXR *
Reserved *
CCR
PC
1
*
4
1
REJ09B0071-0500
*
3
Section 2 CPU
*
4
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