DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 119
DF2266TF13V
Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2266TF20V.pdf
(712 pages)
Specifications of DF2266TF13V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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5.1
This LSI controls interrupts with the interrupt controller. The interrupt controller has the following
features:
• Two interrupt control modes (H8S/2268 Group only)
• Priorities settable with IPR (H8S/2268 Group only)
• Independent vector addresses
• External interrupts
• DTC control (H8S/2268 Group only)
A block diagram of the interrupt controller for the H8S/2268 Group is shown in figure 5.1, and
that for the H8S/2264 Group is shown in figure 5.2
⎯ Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in
⎯ An interrupt priority register (IPR) is provided for setting interrupt priorities. Eight priority
⎯ All interrupt sources except WKP7 to WKP0 are assigned independent vector addresses,
H8S/2268 Group: 14 (NMI, IRQ5 to IRQ3, IRQ1, IRQ0, and WKP7 to WKP0)
H8S/2264 Group: 13 (NMI, IRQ4, IRQ3, IRQ1, IRQ0, and WKP7 to WKP0)
⎯ NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling
⎯ The DTC can be activated by an interrupt request.
the system control register (SYSCR).
levels can be set for each module for all interrupts except NMI. NMI is assigned the
highest priority level of 8, and can be accepted at all times.
making it unnecessary for the source to be identified in the interrupt handling routine.
edge can be selected for NMI. Falling edge, rising edge, or both edge detection, or level
sensing, can be independently selected for IRQ5 to IRQ3, IRQ1, and IRQ0.
WKP7 to WKP0 are accepted at a falling edge
Features
Section 5 Interrupt Controller
Rev. 5.00 Sep. 01, 2009 Page 67 of 656
Section 5 Interrupt Controller
REJ09B0071-0500
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