DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 205
![IC H8S/2266 MCU FLASH 100-TQFP](/photos/12/29/122926/df2266tf13v_sml.jpg)
DF2266TF13V
Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2266TF20V.pdf
(712 pages)
Specifications of DF2266TF13V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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9.2.3
PORT3 shows the pin states. This register cannot be modified.
Note: * Determined by the states of pins P35 to P30.
9.2.4
P3ODR controls on/off state of the PMOS for port 3 pins.
Bit
7, 6
5
4
3
2
1
0
Bit
7, 6
5
4
3
2
1
0
Bit Name
⎯
P35
P34
P33
P32
P31
P30
Bit Name
⎯
P35ODR
P34ODR
P33ODR
P32ODR
P31ODR
P30ODR
Port 3 Register (PORT3)
Port 3 Open Drain Control Register (P3ODR)
Initial
Value
Undefined ⎯
⎯*
⎯*
⎯*
⎯*
⎯*
⎯*
Initial
Value
Undefined ⎯
0
0
0
0
0
0
R/W
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as undefined value and
cannot be modified.
If a port 3 read is performed while P3DDR bits are set
to 1, the P3DR values are read. If a port 3 read is
performed while P3DDR bits are cleared to 0, the pin
states are read.
Description
Reserved
These bits are always read as undefined value and
cannot be modified.
When each of P33ODR to P30ODR bits is set to 1, the
corresponding pins P33 to P30 function as NMOS open
drain outputs. When cleared to 0, the corresponding
pins function as CMOS outputs. When each of P35ODR
and P34ODR bits is set to 1, the corresponding pins
P35 and P34 function as NMOS open drain outputs.
When they are cleared to 0, the corresponding pins
function as NMOS push pull outputs.
Rev. 5.00 Sep. 01, 2009 Page 153 of 656
Section 9 I/O Ports
REJ09B0071-0500
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