DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 454

IC H8S/2266 MCU FLASH 100-TQFP

DF2266TF13V

Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2266TF13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 14 I
Rev. 5.00 Sep. 01, 2009 Page 402 of 656
REJ09B0071-0500
4
Bit
3
2
Bit Name
AASX
AL
AAS
2
C Bus Interface (IIC) (Supported as an Option by H8S/2264 Group)
Initial
Value
0
0
0
R/W
R/(W) * Second Slave Address Recognition Flag
R/(W) * Arbitration Lost Flag
R/(W) * Slave Address Recognition Flag
Description
[Setting condition]
When the second slave address is detected in slave
receive mode and FSX = 0
[Clearing conditions]
Indicates that bus arbitration was lost in master mode.
[Setting condition]
[Clearing conditions]
[Setting condition]
When the slave address or general call address (one
frame including a R/W bit is H'00) is detected in slave
receive mode and FS = 0.
[Clearing conditions]
When 0 is written in AASX after reading AASX = 1
When a start condition is detected
In master mode
When the internal SDA and SDA pin do not match at
the rise of SCL.
When the internal SCL is high at the fall of SCL.
When 0 is written in AL after reading AL = 1
When ICDR data is written (transmit mode) or read
(receive mode)
When ICDR data is written (transmit mode) or read
(receive mode)
When 0 is written in AAS after reading AAS = 1
In master mode

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