DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 299

IC H8S/2266 MCU FLASH 100-TQFP

DF2266TF13V

Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2266TF13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
10.10 Usage Notes
10.10.1 Module Stop Mode Setting
TPU operation can be disabled or enabled using the module stop control register. The initial
setting is for TPU operation to be halted. Register access is enabled by clearing module stop
mode. For details, refer to section 22, Power-Down Modes.
10.10.2 Input Clock Restrictions
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The TPU will not operate properly at narrower
pulse widths.
In the H8S/2268 Group phase counting mode, the phase difference and overlap between the two
input clocks must be at least 1.5 states, and the pulse width must be at least 2.5 states. Figure
10.45 shows the input clock conditions in phase counting mode.
Figure 10.44 Timing for Status Flag Clearing by DTC Activation (H8S/2268 Group Only)
Address
Status flag
Interrupt
request
signal
φ
Source address
T1
read cycle
DTC
T2
Rev. 5.00 Sep. 01, 2009 Page 247 of 656
Section 10 16-Bit Timer Pulse Unit (TPU)
T1
write cycle
Destination
address
DTC
T2
REJ09B0071-0500

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