DF2266TF13V Renesas Electronics America, DF2266TF13V Datasheet - Page 449

IC H8S/2266 MCU FLASH 100-TQFP

DF2266TF13V

Manufacturer Part Number
DF2266TF13V
Description
IC H8S/2266 MCU FLASH 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2266TF13V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
13MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Bit
2
Bit Name
BBSY
Section 14 I
Initial
Value
0
2
C Bus Interface (IIC) (Supported as an Option by H8S/2264 Group)
R/W
R/W
Description
Bus Busy
In slave mode, reading the BBSY flag enables to confirm
whether the I
flag is set to 0 when the SDA level changes from high to
low under the condition of SCl = high, assuming that the
start condition has been issued. The BBSY flag is cleared
to 0 when the SDA level changes from low to high under
the condition of SCl = high, assuming that the start
condition has been issued. Writing to the BBSY flag in
slave mode is disabled.
In master mode, the BBSY flag is used to issue start and
stop conditions. Write 1 to BBSY and 0 to SCP to issue a
start condition. Follow this procedure when also re-
transmitting a start condition. To issue a start/stop
condition, use the MOV instruction. The I
must be set in master transmit mode before the issue of a
start condition.
2
C bus is occupied or released. The BBSY
Rev. 5.00 Sep. 01, 2009 Page 397 of 656
REJ09B0071-0500
2
C bus interface

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