S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 953

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 26
384 KByte Flash Module (S12XFTM384K2V1)
26.1
The FTM384K2 module implements the following:
Freescale Semiconductor
Revision
Number
V01.10
V01.11
V01.12
384 Kbytes of P-Flash (Program Flash) memory, consisting of 2 physical Flash blocks, intended
primarily for nonvolatile code storage
32 Kbytes of D-Flash (Data Flash) memory, consisting of 1 physical Flash block, that can be used
as nonvolatile storage to support the built-in hardware scheme for emulated EEPROM, as basic
Flash memory primarily intended for nonvolatile data storage, or as a combination of both
Introduction
29 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
26.3.2.1/26-965
26.4.2.4/26-992
26.4.2.7/26-995
26.3.2.1/26-965
26.4.1.2/26-984
26.4.2/26-989
26.4.2/26-989
26.3.1/26-958
26.3.2/26-963
26.4.2.12/26-
26.4.2.12/26-
26.4.2.12/26-
26.4.2.20/26-
26.6/26-1014
26.1/26-953
Sections
Affected
1008
999
999
999
MC9S12XE-Family Reference Manual Rev. 1.25
Table 26-1. Revision History
- Cleanup
- Updated Command Error Handling tables based on parent-child relationship
with FTM512K3
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash IFR Accessibility table
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
953

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