S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 1284

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Appendix E Detailed Register Address Map
0x00D0–0x00D7 Asynchronous Serial Interface (SCI1) Map (continued)
1. Those registers are accessible if the AMAP bit in the SCI1SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI1SR2 register is set to one
0x00D8–0x00DF Serial Peripheral Interface (SPI0) Map
0x00E0–0x00E7 Inter IC Bus (IIC0) Map
1284
Address
Address
Address
0x00DB
0x00DC
0x00DD
0x00DE
0x00D5
0x00D6
0x00D7
0x00D8
0x00D9
0x00DA
0x00DF
0x00E0
0x00E1
0x00E2
0x00E3
0x00E4
SCI1DRH
SPI0DRH
Reserved
Reserved
SCI1SR2
SCI1DRL
SPI0CR1
SPI0CR2
SPI0DRL
SPI0BR
SPI0SR
Name
Name
Name
IBAD
IBFD
IBCR
IBSR
IBDR
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
AMAP
ADR7
IBEN
Bit 7
Bit 7
SPIE
SPIF
Bit 7
IBC7
TCF
R15
T15
R8
R7
R7
D7
T7
T7
0
0
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
SPPR2
XFRW
ADR6
IAAS
Bit 6
Bit 6
Bit 6
IBC6
SPE
IBIE
R14
T14
R6
R6
T8
T6
T6
D6
0
0
0
0
SPPR1
SPTEF
MS/SL
SPTIE
ADR5
Bit 5
Bit 5
Bit 5
IBC5
R13
T13
IBB
R5
R5
T5
T5
D5
0
0
0
0
0
MODFEN
TXPOL
SPPR0
MODF
TX/RX
MSTR
ADR4
Bit 4
Bit 4
Bit 4
IBC4
IBAL
R12
T12
R4
R4
T4
T4
D4
0
0
0
BIDIROE
RXPOL
CPOL
ADR3
TXAK
Bit 3
Bit 3
Bit 3
IBC3
R11
T11
R3
R3
T3
T3
D3
0
0
0
0
0
0
BRK13
CPHA
SPR2
ADR2
RSTA
IBC2
SRW
Bit 2
Bit 2
Bit 2
R10
T10
R2
T2
R2
T2
D2
0
0
0
0
0
0
Freescale Semiconductor
SPISWAI
TXDIR
SSOE
SPR1
ADR1
IBC1
Bit 1
Bit 1
Bit 1
IBIF
R1
R9
R1
T1
T9
T1
D1
0
0
0
0
0
IBSWAI
LSBFE
RXAK
SPC0
SPR0
IBC0
Bit 0
Bit 0
Bit 0
RAF
R0
R8
R0
D 0
T0
T8
T0
0
0
0
0
0