S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 1125

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

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Part Number:
S912XEP768J5MAGR
Manufacturer:
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Quantity:
10 000
28.4.2.14 Set Field Margin Level Command
The Set Field Margin Level command, valid in special modes only, causes the Memory Controller to set
the margin level specified for future read operations of a specific P-Flash or D-Flash block.
Upon clearing CCIF to launch the Set Field Margin Level command, the Memory Controller will set the
field margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set Field Margin Level command are defined in
Freescale Semiconductor
1. As defined by the memory map for FTM1024K5.
FERSTAT
Register
FSTAT
User margin levels can be used to check that Flash memory contents have
adequate margin for normal level read operations. If unexpected results are
encountered when checking Flash memory contents at user margin levels, a
potential loss of information has been detected.
CCOBIX[2:0]
Table 28-60. Set Field Margin Level Command FCCOB Requirements
000
001
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Table 28-59. Set User Margin Level Command Error Handling
Error Bit
FPVIOL
(CCOBIX=001)
Table 28-61. Valid Set Field Margin Level Settings
0x0000
0x0001
CCOB
MC9S12XE-Family Reference Manual Rev. 1.25
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid global address [22:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
None
0x0E
NOTE
Return to Normal Level
User Margin-1 Level
FCCOB Parameters
Margin level setting
Level Description
Global address [22:16] to identify the Flash
Error Condition
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
(1)
block
(1)
Table
28-30)
Table
28-61.
1125

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