S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 626

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
1. Read: Always reads zero in normal system operation modes
16.3.2.14 MSCAN Miscellaneous Register (CANMISC)
This register provides additional features.
1. Read: Anytime
16.3.2.15 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
626
Module Base + 0x000C
Module Base + 0x000D
BOHOLD
Write: Unimplemented in normal system operation modes
Write: Anytime; write of ‘1’ clears flag; write of ‘0’ ignored
Field
0
Reset:
Reset:
W
W
R
R
Bus-off State Hold Until User Request — If BORM is set in MSCAN Control Register 1
indicates whether the module has entered the bus-off state. Clearing this bit requests the recovery from bus-off.
Refer to
0 Module is not bus-off or recovery has been requested by user in bus-off state
1 Module is bus-off and holds this state until user request
Writing to this register when in special system operating modes can alter the
MSCAN functionality.
0
0
0
0
7
7
Section 16.5.2, “Bus-Off
Figure 16-17. MSCAN Miscellaneous Register (CANMISC)
= Unimplemented
= Unimplemented
Table 16-21. CANMISC Register Field Descriptions
6
0
0
6
0
0
MC9S12XE-Family Reference Manual Rev. 1.25
Figure 16-16. MSCAN Reserved Register
0
0
0
0
Recovery,” for details.
5
5
NOTE
4
0
0
4
0
0
Description
0
0
0
0
3
3
2
0
0
2
0
0
Access: User read/write
Access: User read/write
Freescale Semiconductor
(CANCTL1),
0
0
0
0
1
1
BOHOLD
this bit
0
0
0
0
0
(1)
(1)