S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 818

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

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Quantity
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Part Number:
S912XEP768J5MAGR
Manufacturer:
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Quantity:
10 000
Chapter 23 Voltage Regulator (S12VREGL3V3V1)
23.2
Due to the nature of VREG_3V3 being a voltage regulator providing the chip internal power supply
voltages, most signals are power supply signals connected to pads.
23.2.1
Signal VDDR is the power input of VREG_3V3. All currents sourced into the regulator loads flow through
this pin. A chip external decoupling capacitor (100 nF...220 nF, X7R ceramic) between VDDR and VSSR
(if VSSR is not available VSS) can smooth ripple on VDDR.
For entering Shutdown Mode, pin VDDR should also be tied to ground on devices without VREGEN pin.
23.2.2
Signals VDDA/VSSA
regulator. Internal precision reference circuits are supplied from these signals. A chip external decoupling
capacitor (100 nF...220 nF, X7R ceramic) between VDDA and VSSA can further improve the quality of
this supply.
23.2.3
Signals VDD/VSS are the primary outputs of VREG_3V3 that provide the power supply for the core logic.
These signals are connected to device pins to allow external decoupling capacitors (220 nF, X7R ceramic).
In Shutdown Mode an external supply driving VDD/VSS can replace the voltage regulator.
818
Table 23-2
External Signal Description
shows all signals of VREG_3V3 associated with pins.
VDDR — Regulator Power Input Pins
VDDA, VSSA — Regulator Reference Supply Pins
VDD, VSS — Regulator Output1 (Core Logic) Pins
Check device level specification for connectivity of the signals.
VREGEN (optional)
VREG_API
(optional)
VDDPLL
VSSPLL
VDDR
VDDX
Name
VDDA
VSSA
VDDF
,
VDD
VSS
which are supposed to be relatively quiet, are used to supply the analog parts of the
MC9S12XE-Family Reference Manual Rev. 1.25
Power input (positive supply)
Quiet input (positive supply)
Quiet input (ground)
Power input (positive supply)
Primary output (positive supply)
Primary output (ground)
Secondary output (positive supply)
Tertiary output (positive supply)
Tertiary output (ground)
Optional Regulator Enable
VREG Autonomous Periodical
Interrupt output
Table 23-2. Signal Properties
Function
NOTE
Reset State
Pull Up
Freescale Semiconductor

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