S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 258

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 5 External Bus Interface (S12XEBIV4)
state operation (stretching) of the external bus access is done in emulation modes when accessing internal
memory or emulation memory addresses.
In both modes observation of the internal operation is supported through the external bus (internal
visibility).
5.5.2.1
This mode is used for emulation systems in which the target application is operating in normal single-chip
mode.
Figure 5-5
The timing diagram for this operation is shown in:
The associated timing numbers are given in:
Timing considerations:
258
Figure ‘Example 2a: Emulation Single-Chip Mode — Read Followed by Write’
Table ‘Example 2a: Emulation Single-Chip Mode Timing (EWAIT disabled)’
Signals muxed with address lines ADDRx, i.e., IVDx, IQSTATx and ACCx, have the same timing.
LSTRB has the same timing as RW.
shows the PRU connection with the available external bus signals in an emulator application.
Example 2a: Emulation Single-Chip Mode
ADDR[22:20]/ACC[2:0]
Figure 5-5. Application in Emulation Single-Chip Mode
ADDR[22:0]/IVD[15:0]
S12X_EBI
MC9S12XE-Family Reference Manual Rev. 1.25
ADDR[19:16]/
IQSTAT[3:0]
DATA[15:0]
ECLKX2
LSTRB
ECLK
RW
EMULMEM
PRU
Emulator
PRR
Ports
Freescale Semiconductor

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