S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 1219

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

A.2
This section describes the characteristics of the analog-to-digital converter.
A.2.1
The
The following constraints exist to obtain full-scale, full range results:
This constraint exists since the sample buffer amplifier can not drive beyond the power supply levels that
it ties to. If the input level goes outside of this range it will effectively be clipped.
1. When converting in Stop Mode (ICLKSTP=1) an ATD Stop Recovery time tATDSTPRCV is required to switch back to bus clock
2. The minimum time assumes a sample time of 4 ATD clock cycles. The maximum time assumes a sample time of 24 ATD clock
A.2.2
Source resistance, source capacitance and current injection have an influence on the accuracy of the ATD.
A further factor is that PortAD pins that are configured as output drivers switching.
A.2.2.1
The accuracy is reduced if the differential reference voltage is less than 3.13V when using the ATD in the
3.3V range or if the differential reference voltage is less than 4.5V when using the ATD in the 5V range.
Freescale Semiconductor
Conditions are shown in
Num C
based ATDCLK when leaving Stop Mode. Do not access ATD registers during this time.
cycles and the discharge feature (SMP_DIS) enabled, which adds 2 ATD clock cycles.
1
2
3
4
5
6
7
8
Table A-15
D Reference potential
D Voltage difference V
D Voltage difference V
C Differential reference voltage
C ATD Clock Frequency (derived from bus clock via the
P ATD Clock Frequency in Stop mode (internal generated
D ADC conversion in stop, recovery time
D
V
SSA
prescaler)
temperature and voltage dependent clock, ICLK)
ATD Conversion Period
12 bit resolution:
10 bit resolution:
8 bit resolution:
ATD Characteristics
ATD Operating Characteristics
Factors Influencing Accuracy
Low
High
Differential Reference Voltage
≤ V
and
RL
≤ V
Table A-16
Table A-4
IN
DDX
SSX
≤ V
(2)
unless otherwise noted, supply voltage 3.13V < V
to V
to V
Rating
RH
MC9S12XE-Family Reference Manual Rev. 1.25
Table A-15. ATD Operating Characteristics
show conditions under which the ATD operates.
SSA
DDA
≤ V
DDA
(1)
.
t
N
N
ATDSTPRC
N
V
Symbol
f
∆
∆
CONV12
CONV10
ATDCLk
RH
CONV8
V
V
VDDX
VSSX
RH
V
RL
-V
RL
V
–2.35
DDA
V
–0.1
3.13
0.25
DDA
Min
0.6
20
19
17
—
SSA
/2
< 5.5 V
Appendix A Electrical Characteristics
Typ
5.0
—
—
—
—
—
—
—
0
0
1
V
V
Max
DDA
0.1
0.1
5.5
8.3
1.7
1.5
42
41
39
DDA
/2
Cycles
clock
MHz
MHz
ATD
Unit
us
V
V
V
V
V
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