S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 343

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

8.4.7.1
The XGATE software breakpoint instruction BRK can request a CPU12X breakpoint, via the S12XDBG
module. In this case, if the XGSBPE bit is set, the S12XDBG module immediately generates a forced
breakpoint request to the CPU12X, the state sequencer is returned to state0 and tracing, if active, is
terminated. If configured for BEGIN trigger and tracing has not yet been triggered from another source,
the trace buffer contains no information. Breakpoint requests from the XGATE module do not depend
upon the state of the DBGBRK or ARM bits in DBGC1. They depend solely on the state of the XGSBPE
and BDM bits. Thus it is not necessary to ARM the DBG module to use XGATE software breakpoints to
generate breakpoints in the CPU12X program flow, but it is necessary to set XGSBPE. Furthermore, if a
breakpoint to BDM is required, the BDM bit must also be set. When the XGATE requests an CPU12X
breakpoint, the XGATE program flow stops by default, independent of the S12XDBG module.
8.4.7.2
Breakpoints can be generated when internal comparator channels trigger the state sequencer to the Final
State. If configured for tagging, then the breakpoint is generated when the tagged opcode reaches the
execution stage of the instruction queue.
If a tracing session is selected by TSOURCE, breakpoints are requested when the tracing session has
completed, thus if Begin or Mid aligned triggering is selected, the breakpoint is requested only on
completion of the subsequent trace (see
requested immediately.
If the BRK bit is set on the triggering channel, then the breakpoint is generated immediately independent
of tracing trigger alignment.
Freescale Semiconductor
BRK
0
0
0
0
0
0
1
1
x
XGATE Software Breakpoints
Breakpoints From Internal Comparator Channel Final State Triggers
Table 8-48. Breakpoint Setup For Both XGATE and CPU12X Breakpoints
00,01,10
00,01,10
TALIGN
00
00
01
01
10
10
11
DBGBRK[n]
MC9S12XE-Family Reference Manual Rev. 1.25
0
1
0
1
0
1
1
0
x
Table
8-48). If no tracing session is selected, breakpoints are
Terminate tracing and generate breakpoint immediately on trigger
Fill Trace Buffer until trigger, then breakpoint request occurs
Request breakpoint after the 32 further Trace Buffer entries
Store a further 32 Trace Buffer line entries after trigger
Store a further 32 Trace Buffer line entries after trigger
A breakpoint request occurs when Trace Buffer is full
Terminate tracing immediately on trigger
(no breakpoints — keep running)
(no breakpoints — keep running)
(no breakpoints — keep running)
Fill Trace Buffer until trigger
Start Trace Buffer at trigger
Start Trace Buffer at trigger
Breakpoint Alignment
Chapter 8 S12X Debug (S12XDBGV3) Module
Reserved
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