S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 485

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Write: Only in special modes
11.3.2.12 S12XECRG COP Timer Arm/Reset Register (ARMCOP)
This register is used to restart the COP time-out period.
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”) writing to this register has no effect.
When the COP is enabled by setting CR[2:0] nonzero, the following applies:
Freescale Semiconductor
Module Base + 0x000B
Reset
W
R
Writing any value other than $55 or $AA causes a COP reset. To restart the COP time-out period
you must write $55 followed by a write of $AA. Other instructions may be executed between these
writes but the sequence ($55, $AA) must be completed prior to COP end of time-out period to
avoid a COP reset. Sequences of $55 writes or sequences of $AA writes are allowed. When the
WCOP bit is set, $55 and $AA writes must be done in the last 25% of the selected time-out period;
writing any value in the first 75% of the selected period will cause a COP reset.
Bit 7
0
0
7
Bit 6
0
0
6
Figure 11-14. S12XECRG ARMCOP Register Diagram
MC9S12XE-Family Reference Manual Rev. 1.25
Bit 5
0
0
5
Bit 4
0
0
4
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
Bit 3
0
0
3
Bit 2
0
0
2
Bit 1
0
0
1
Bit 0
0
0
0
485

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