SAF1761BE/V1,518 NXP Semiconductors, SAF1761BE/V1,518 Datasheet - Page 89

• Manufacturer Part Number: SAF1761BE/V1,518
• Manufacturer: NXP Semiconductors

Specifications of SAF1761BE/V1,518

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
SAF1761_1
Product data sheet
Fig 15. Dual-role B-device state diagram
9.4.3 HNP implementation and OTG state machine
chrg_vbus/
loc_conn/
START
b_host
loc_sof
a_conn
The OTG state machine is the software behind all the OTG functionality. It is implemented
in the microprocessor system that is connected to the SAF1761. The SAF1761 provides
registers for all input status, the output control and timers to fully support the state
machine transitions in
b_wait_acon
•
•
•
•
•
b_sess_vld/
chrg_vbus/
loc_conn/
loc_sof/
OTG Control register: Provides control to V
line pull-up or pull-down, SRP detection, and so on.
OTG Status register: Provides status detection on V
V
OTG Interrupt Latch register: Provides interrupts for status change in OTG Interrupt
Status register bits and the OTG Timer time-out event.
OTG Interrupt Enable Fall and OTG Interrupt Enable Rise registers: Provide interrupt
mask for OTG Interrupt Latch register bits.
OTG Timer register: Provides 0.01 ms base programmable timer for use in the OTG
state machine.
id/ |
BUS
session valid, session end, overcurrent and bus status.
b_sess_vld/
id/ |
Rev. 01 — 18 November 2009
Figure 14
b_ase0_brst_tmout
a_bus_resume |
a_bus_suspend
b_bus_req/ |
chrg_vbus/
b_bus_req &
b_hnp_en &
drv_vbus/
loc_conn/
loc_sof/
b_idle
a_conn/
b_sess_vld/
and
Figure
id/ |
15. These registers include:
BUS
id/
b_srp_done
driving, charging or discharging, data
id/ |
b_sess_end &
b_bus_req &
b_se0_srp
BUS
b_peripheral
Hi-Speed USB OTG controller
chrg_vbus/
b_sess_vld
loc_conn
loc_sof/
and data lines including ID,
pulse chrg_vbus
pulse loc_conn
chrg_vbus/
drv_vbus/
loc_conn/
b_srp_init
loc_sof/
a_idle
loc_sof/
004aaa567
SAF1761
© NXP B.V. 2009. All rights reserved.
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