SAF1761BE/V1,518 NXP Semiconductors, SAF1761BE/V1,518 Datasheet - Page 82

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SAF1761BE/V1,518

Manufacturer Part Number
SAF1761BE/V1,518
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAF1761BE/V1,518

Lead Free Status / Rohs Status
Compliant

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Part Number
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Part Number:
SAF1761BE/V1,518
Manufacturer:
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Quantity:
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NXP Semiconductors
Table 76.
SAF1761_1
Product data sheet
Bit
DW3
63
62
61
60
59
58
57
56 to 55
54 to 44
43 to 32
DW2
31 to 24
23 to 8
7 to 0
DW1
63 to 57
56 to 50
49 to 48
47
46
45 to 44
Symbol
A
H
B
X
SC
reserved
DT
Cerr[1:0]
reserved
NrBytes
Transferred
[11:0]
reserved
DataStart
Address[15:0]
HubAddress
[6:0]
PortNumber
[6:0]
SE[1:0]
reserved
S
EPType[1:0]
Start and complete split for interrupt: bit description
Frame[7:0]
Access
SW — sets
HW — resets
HW — writes
HW — writes
HW — writes
SW — writes
0
HW —
updates
-
HW — writes
SW — writes
HW — writes
SW — writes
-
HW — writes
-
SW — writes
SW — writes
SW — writes
SW — writes
SW — writes
-
SW — writes
SW — writes
Value Description
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 01 — 18 November 2009
Active: Write the same value as that in V.
Halt: The Halt bit is set when any microframe transfer status has a
stalled or halted condition.
Babble: This bit corresponds to bit 1 of Status0 to Status7 for every
microframe transfer status.
Transaction Error: This bit corresponds to bit 0 of Status0 to Status7
for every microframe transfer status.
Start/Complete:
0 — Start split
1 — Complete split
-
Data Toggle: For an interrupt transfer, set correct bit to start the PTD.
Error Counter: This field corresponds to the Cerr[1:0] field in TD.
00 — The transaction will not retry.
11 — The transaction will retry three times. Hardware will decrement
these values.
-
Number of Bytes Transferred: This field indicates the number of
bytes sent or received for this transaction.
-
Data Start Address: This is the start address for data that will be sent
or received on or from the USB bus. This is the internal memory
address and not the CPU address.
Bits 7 to 3 is the polling rate in milliseconds. Polling rate is defined as
2
millisecond. See
Hub Address: This indicates the hub address.
Port Number: This indicates the port number of the hub or
embedded TT.
This depends on the endpoint type and direction. It is valid only for split
transactions.
-
This bit indicates whether a split transaction has to be executed:
0 — High-speed transaction
1 — Split transaction
Transaction type:
11 — Interrupt
(b
1)
SOF; where b = 4 to 16. When b is 4, executed every
Table 78
…continued
Table
applies to start split and complete split only.
77.
Hi-Speed USB OTG controller
SAF1761
© NXP B.V. 2009. All rights reserved.
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