SAF1761BE/V1,518 NXP Semiconductors, SAF1761BE/V1,518 Datasheet - Page 153

• Manufacturer Part Number: SAF1761BE/V1,518
• Manufacturer: NXP Semiconductors

Specifications of SAF1761BE/V1,518

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
SAF1761_1
Product data sheet
18.6.3.3 Remarks
18.7.1 Problem description
18.7.2 Implication
18.7 Errata added on 2009-04-20
To determine and resolve the problematic condition, the following steps are taken:
See also
Because of this erratum, Keep-Alive EOP will not appear on the USB bus for more than
3 ms and the device will enter the suspend state. After implementing the above mentioned
workaround, Keep-Alive EOP will start and the device will wake up to continue the
function. In rare cases, because of the device implementation, there is a possibility that
the device may not accept further requests from the host after the workaround. In such
cases, application must perform the following partial enumeration steps to make the
device work:
As SAF1761 has individual port power control mechanism, above sequence will be
effective if the full-speed or low-speed device is directly connected to SAF1761 ports.
VBUSSTAT bit of the Mode Register (020Ch) is not getting set in SAF1761, if port 1 is
configured as a peripheral and V
If SAF1761 peripheral is connected to bus-powered hub, there is a possibility of the V
becoming less than 4.5 V; in such cases, VBUSSTAT bit in the MODE register of SAF1761
doesn’t get set. Because of this, there is no way for the SAF1761 peripheral to detect that
a PC host controller or a hub is attached to it and thus the SAF1761 peripheral will not pull
high the DP line; In turn, the USB host will never detect the SAF1761 peripheral.
1. Port power off
2. Port power on
3. Get descriptor
4. Set interface
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Check the completion status once a PTD scheduled towards a full-speed or
low-speed device and connected through the internal hub is completed.
If the PTD has been completed successfully, clear the variable that keeps track of the
number of the times the port has been force enabled.
If the PTD has been completed with a HALT condition, get the port status of the port
on which it is connected to the internal hub.
Determine if the Port Enable bit is cleared when a device is still connected to the port.
Ensure that the port has not been force enabled three consecutive times by checking
the variable that keeps track of the number of times the port has been force enabled.
Otherwise, reset the port if it has been force enabled three consecutive times.
Invoke the software workaround.
Section
18.6.3.3.
Rev. 01 — 18 November 2009
BUS
is below 4.5 V.
Hi-Speed USB OTG controller
SAF1761
© NXP B.V. 2009. All rights reserved.
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BUS