ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 86

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.5.5
17.5.6
17.6
8042B–AVR–06/10
Input Capture Unit
8-bit Input Capture Mode
16-bit Input Capture Mode
value of TCNTn, the counter will miss the Compare Match. The counter will then have to count to
its maximum value (0xFFFF) and wrap around starting at 0x0000 before Compare Match can
occur. As for the 16-bit Mode, the TOVn Flag is set in the same timer clock cycle that the counter
counts from MAX to 0x0000.
The Timer/Counter can be used in a 8-bit Input Capture mode, see
settings. For full description, see
The Timer/Counter can also be used in a 16-bit Input Capture mode, see
for bit settings. For full description, see
The Timer/Counter incorporates an Input Capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicates an event, or mul-
tiple events. For Timer/Counter0, the events can be applied via the PB0 pin (ICP00), or
alternatively via the osi_posedge pin on the Oscillator Sampling Interface (ICP01). For
Timer/Counter1, the events can be applied by the Battery Protection Interrupt (ICP10) or alter-
natively by the Voltage Regulator Interrupt (ICP11). The time-stamps can then be used to
calculate frequency, duty-cycle, and other features of the signal applied. Alternatively the time-
stamps can be used for creating a log of the events.
The Input Capture unit is illustrated by the block diagram shown in
elements of the block diagram that are not directly a part of the Input Capture unit are gray
shaded.
Figure 17-4. Input Capture Unit Block Diagram
The Output Compare Register OCRnA is a dual-purpose register that is also used as an 8-bit
Input Capture Register ICRn. In 16-bit Input Capture mode the Output Compare Register
OCRnB serves as the high byte of the Input Capture Register ICRn. In 8-bit Input Capture mode
the Output Compare Register OCRnB is free to be used as a normal Output Compare Register,
ICPn1
ICPn0
WRITE
OCRnB (8-bit)
TEMP (8-bit)
ICRn (16-bit Register)
”Input Capture Unit” on page
OCRnA (8-bit)
ICSn
”Input Capture Unit” on page
DATA BUS
Canceler
Noise
ICNCn
ATmega16HVB/32HVB
(8-bit)
TCNTnH (8-bit)
TCNTn (16-bit Counter)
Detector
86.
ICESn
Edge
Table 17-2 on page 84
Figure 17-4 on page
86.
TCNTnL (8-bit)
Table 17-2 on page 84
ICFn (Int.Req.)
86. The
for bit
86