ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 189
ATAVRSB202
Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Specifications of ATAVRSB202
Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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28. debugWIRE On-chip Debug System
28.1
28.2
28.3
8042B–AVR–06/10
Features
Overview
Physical Interface
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The debugWIRE On-chip debug system uses a One-wire, bi-directional interface to control the
program flow, execute AVR instructions in the CPU and to program the different non-volatile
memories.
When the debugWIRE Enable (DWEN) Fuse is programmed and Lock bits are unprogrammed,
the debugWIRE system within the target device is activated. The RESET port pin is configured
as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes the commu-
nication gateway between target and emulator.
Figure 28-1. The debugWIRE Setup
Figure 28-1
connector. The system clock is not affected by debugWIRE and will always be the clock source
selected by the OSCSEL Fuses.
Complete Program Flow Control
Emulates All On-chip Functions, Both Digital and Analog, except RESET Pin
Real-time Operation
Symbolic Debugging Support (Both at C and Assembler Source Level, or for Other HLLs)
Unlimited Number of Program Break Points (Using Software Break Points)
Non-intrusive Operation
Electrical Characteristics Identical to Real Device
Automatic Configuration System
High-Speed Operation
Programming of Non-volatile Memories
shows the schematic of a target MCU, with debugWIRE enabled, and the emulator
dW
dW
GND
GND
dW(RESET)
dW(RESET)
ATmega16HVB/32HVB
VCC
VCC
3.0 - 5.5V
1.8 - 5.5V
189
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