ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 157

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.2.1
27.2.2
27.3
27.3.1
8042B–AVR–06/10
Data Transfer and Frame Format
TWI Terminology
Electrical Interconnection
Transferring Bits
The following definitions are frequently encountered in this section.
Table 27-1.
As depicted in
pull-up resistors. The bus drivers of all TWI-compliant devices are open-drain or open-collector.
This implements a wired-AND function which is essential to the operation of the interface. A low
level on a TWI bus line is generated when one or more TWI devices output a zero. A high level
is output when all TWI devices tri-state their outputs, allowing the pull-up resistors to pull the line
high. Note that all AVR devices connected to the TWI bus must be powered in order to allow any
bus operation.
The number of devices that can be connected to the bus is only limited by the bus capacitance
limit of 400 pF and the 7-bit slave address space. A detailed specification of the electrical char-
acteristics of the TWI is given in
Each data bit transferred on the TWI bus is accompanied by a pulse on the clock line. The level
of the data line must be stable when the clock line is high. The only exception to this rule is for
generating start and stop conditions.
Figure 27-2. Data Validity
Term
Master
Slave
Transmitter
Receiver
SDA
TWI Terminology
SCL
Figure
Description
The device that initiates and terminates a transmission. The Master also generates the
SCL clock.
The device addressed by a Master.
The device placing data on the bus.
The device reading data from the bus.
27-1, both bus lines are connected to the positive supply voltage through
”2-wire Serial Interface Characteristics” on page
Data Stable
Data Change
ATmega16HVB/32HVB
Data Stable
237.
157