ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 65

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.4.1
8042B–AVR–06/10
Alternate Functions of Port C
Table 14-1.
The Port C pins with alternate functions are shown in
Table 14-2.
The alternate pin configuration is as follows:
• INT0/ EXTPROT – Port C, Bit 0
INT0: External Interrupt Source 0. This pin can serve as external interrupt source. INT0 can be
used as an interrupt pin regardless of whether another function is enabled or not.
EXTPROT: External Battery Protection Input. This pin can serve as external battery protection
input to be able to override the FET controller externally.
• INT1 – Port C, Bit1
INT1: External Interrupt Source 1. This pin can serve as external interrupt source. INT1 can be
used as an interrupt pin regardless of whether another function is enabled or not.
• INT2 – Port C, Bit2
INT2: External Interrupt Source 2. This pin can serve as external interrupt source. INT2 can be
used as an interrupt pin regardless of whether another function is enabled or not.
Signal Name
PVOE
PVOV
DIEOE
DIEOV
DI
Port Pin
PC0
PC1
PC2
PC3
PC4
Generic Description of Overriding Signals for Alternate Functions
Port C Pins Alternate Functions
Full Name
Port Value
Override Enable
Port Value
Override Value
Digital Input
Enable Override
Enable
Digital Input
Enable Override
Value
Digital Input
Alternate Function
INT0/ EXTPROT(External Interrupt 0 or External Battery Protection Input)
INT1 (External interrupt 1)
INT1 (External interrupt 2)
INT3/ SDA (External Interrupt 3 or SM Bus Data line)
SCL (SM Bus Clock line)
Description
If this signal is set and the Output Driver is enabled, the port
value is controlled by the PVOV signal. If PVOE is cleared, and
the Output Driver is enabled, the port Value is controlled by the
PORTxn Register bit.
If PVOE is set, the port value is set to PVOV, regardless of the
setting of the PORTxn Register bit.
If this bit is set, the Digital Input Enable is controlled by the
DIEOV signal. If this signal is cleared, the Digital Input Enable
is determined by MCU state (Normal mode, sleep mode).
If DIEOE is set, the Digital Input is enabled/disabled when
DIEOV is set/cleared, regardless of the MCU state (Normal
mode, sleep mode).
This is the Digital Input to alternate functions. In the figure, the
signal is connected to the output of the schmitt trigger but
before the synchronizer. Unless the Digital Input is used as a
clock source, the module with the alternate function will use its
own synchronizer.
ATmega16HVB/32HVB
Table
14-2.
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