ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 113

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.7.3
8042B–AVR–06/10
CADCSRC – CC-ADC Control and Status Register C
• Bit 5 – CADRCIE: CC-ADC Regular Current Interrupt Enable
When the CADRCIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Regular Current Interrupt is enabled.
• Bit 4 – CADICIE: CC-ADC Instantaneous Current Interrupt Enable
When the CADICIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Instantaneous Current Interrupt is enabled.
• Bit 2 – CADACIF: CC-ADC Accumulate Current Interrupt Flag
The CADACIF bit is set (one) after the Accumulate Current conversion has completed. The CC-
ADC Accumulate Current Interrupt is executed if the CADACIE bit and the I-bit in SREG are set
(one). CADACIF is cleared by hardware when executing the corresponding Interrupt Handling
Vector. Alternatively, CADACIF is cleared by writing a logic one to the flag.
• Bit 1 – CADRCIF: CC-ADC Regular Current Interrupt Flag
The CADRCIF bit is set (one) when the absolute value of the result of the last CC-ADC conver-
sion is greater than, or equal to, the compare values set by the CC-ADC Regular
Charge/Discharge Current Level Registers. A positive value is compared to the Regular Charge
Current Level, and a negative value is compared to the Regular Discharge Current Level. The
CC-ADC Regular Current Interrupt is executed if the CADRCIE bit and the I-bit in SREG are set
(one). CADRCIF is cleared by hardware when executing the corresponding Interrupt Handling
Vector. Alternatively, CADRCIF is cleared by writing a logic one to the flag.
• Bit 0 – CADICIF: CC-ADC Instantaneous Current Interrupt Flag
The CADICIF bit is set (one) when a CC-ADC Instantaneous Current conversion is completed.
The CC-ADC Instantaneous Current Interrupt is executed if the CADICIE bit and the I-bit in
SREG are set (one). CADICIF is cleared by hardware when executing the corresponding Inter-
rupt Handling vector. Alternatively, CADICIF is cleared by writing a logic one to the flag.
• Bit 7:1 – Reserved
These bits are reserved and will always read as zero.
• Bit 0 – CADVSE: CC-ADC Voltage Scaling Enable
Setting this bit enables the internal Voltage Scaling. When enabling the internal Voltage Scaling
the internal CC-ADC reference will be divided by 2, affecting the Input Voltage Range and the
resulting step-size.
size for the CADVSE settings.
Bit
(0xE8)
Read/Write
Initial Value
R
7
0
–
Table 19-3
R
6
0
–
shows the Input Voltage Range and the conversion value step-
R
5
0
–
R
4
–
0
3
R
0
–
ATmega16HVB/32HVB
R
2
0
–
R
1
–
0
CADVSE
R/W
0
0
CADCSRC
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