ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 40

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.8.2
8042B–AVR–06/10
PRR0 – Power Reduction Register 0
• Bits 7:4 – Reserved
These bits are reserved in the ATmega16HVB/32HVB, and will always read as zero.
• Bits 3:1 – SM2:0: Sleep Mode Select Bits 2, 1 and 0
These bits select between the four available sleep modes as shown in
Table 10-3.
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bit 7, 4 – Reserved
These bits are reserved for future use. For compatibility with future devices, these bits must be
written to zero when PRR0 is written.
• Bit 6 – PRTWI: Power Reduction TWI
Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When
waking up the TWI again, the TWI should be re initialized to ensure proper operation.
• Bit 5 – PRVRM: Power Reduction Voltage Regulator Monitor
Writing a logic one to this bit shuts down the Voltage Regulator Monitor interface by stopping the
clock of the module.
• Bit 3 – PRSPI: Power Reduction Serial Peripheral Interface
Writing logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock to
the module. When waking up the SPI again, the SPI should be reinitialized to ensure proper
operation.
Bit
(0x64)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
Sleep Mode Select
R
7
–
0
PRTWI
R/W
6
0
SM1
0
0
1
1
0
0
1
1
PRVRM
R/W
5
0
R
4
–
0
SM0
0
1
0
1
0
1
0
1
PRSPI
R/W
3
0
ATmega16HVB/32HVB
Sleep Mode
Idle
ADC Noise Reduction
Reserved
Power-save
Power-off
Reserved
Reserved
Reserved
PRTIM1
R/W
2
0
PRTIM0
R/W
1
0
Table
10-3.
PRVADC
R/W
0
0
PRR0
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