ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 154
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ATAVRSB202
Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Specifications of ATAVRSB202
Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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26. Cell Balancing
26.1
8042B–AVR–06/10
Overview
ATmega16HVB/32HVB incorporates cell balancing FETs. The chip provides one cell balancing
FET for each battery cell in series. The FETs are directly controlled by the application software,
allowing the cell balancing algorithms to be implemented in software. The FETs are connected
in parallel with the individual battery cells. The cell balancing is illustrated in
ure shows a four-cell configuration. The cell balancing FETs are disabled in the Power-off mode.
For typical current through the Cell Balancing FETs, see
230.
The Cell Balancing FETs are controlled by the CBCR. Neighbouring FETs cannot be simultane-
ously enabled. If trying to enable two neighbouring FETs, both will be disabled.
Figure 26-1. Cell Balancing
RP
RP
RP
RP
RP
T
T
T
T
CB
CB
CB
CB
PV4
PV3
PV2
PV1
NV
Level
Shift
Level
Shift
Level
Shift
Level
Shift
ATmega16HVB/32HVB
Control Register
Cell Balancing
”Electrical Characteristics” on page
Figure
26-1. The fig-
154
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