ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 67

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15. Low Voltage I/O-Ports
15.1
8042B–AVR–06/10
Overview
All low voltage AVR ports have true Read-Modify-Write functionality when used as general digi-
tal I/O ports. This means that the direction of one port pin can be changed without unintentionally
changing the direction of any other pin with the SBI and CBI instructions. The same applies
when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if
configured as input). All low voltage port pins have individually selectable pull-up resistors with a
supply-voltage invariant resistance. All I/O pins have protection diodes to both V
as indicated in
of parameters.
Figure 15-1. Low Voltage I/O Pin Equivalent Schematic
All registers and bit references in this section are written in general form. A lower case “x” repre-
sents the numbering letter for the port, and a lower case “n” represents the bit number. However,
when using the register or bit defines in a program, the precise form must be used. For example,
PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The physical I/O Regis-
ters and bit locations are listed in
Three I/O memory address locations are allocated for each low voltage port, one each for the
Data Register – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The
Port Input Pins I/O location is read only, while the Data Register and the Data Direction Register
are read/write. However, writing a logic one to a bit in the PINx Register, will result in a toggle in
the corresponding bit in the Data Register. In addition, the Pull-up Disable – PUD bit in MCUCR
disables the pull-up function for all low voltage pins in all ports when set.
Using the I/O port as General Digital I/O is described in
I/O” on page
peripheral features on the device. How each alternate function interferes with the port pin is
described in
full description of the alternate functions.
”Alternate Port Functions” on page
68. Many low voltage port pins are multiplexed with alternate functions for the
Pxn
Figure
15-1. Refer to
”Register Description” on page
C
pin
”Electrical Characteristics” on page 230
72. Refer to the individual module sections for a
ATmega16HVB/32HVB
”Low Voltage Ports as General Digital
"General Digital I/O" for
78.
See Figure
R
Details
pu
Logic
for a complete list
REG
and Ground
67