ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 6

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATmega16HVB/32HVB
bined with an extremely low power consumption in the power saving modes, greatly enhances
the cell energy utilization compared to existing solutions.
The chip utilizes Atmel's patented Deep Under-voltage Recovery (DUVR) mode that supports
pre-charging of deeply discharged battery cells without using a separate Pre-charge FET. DUVR
mode cannot be used in 2-cell applications. Optionally, Pre-charge FETs are supported for inte-
gration into many existing battery charging schemes.
The battery protection monitors the charge and discharge current to detect illegal conditions and
protect the battery from these when required. A 12-bit Voltage ADC allows software to monitor
each cell voltage individually with high accuracy. The ADC also provides one internal input chan-
nel to measure on-chip temperature and two input channels intended for external thermistors.
An 18-bit ADC optimized for Coulomb Counting accumulates charge and discharge currents and
reports accumulated current with high resolution and accuracy. It can also be used to provide
instantaneous current measurements with 13 bit resolution. Integrated Cell Balancing FETs
allow cell balancing algorithms to be implemented in software.
The MCU provides the following features: 16K/32K bytes of In-System Programmable Flash with
Read-While-Write capabilities, 512/1K bytes EEPROM, 1K/2K bytes SRAM. 32 general purpose
working registers, 12 general purpose I/O lines, 5 general purpose high voltage open drain I/O
lines, one general purpose super high voltage open drain output, debugWIRE for On-chip
debugging and SPI for In-system Programming, a SM-Bus compliant TWI module, two flexible
Timer/Counters with Input Capture and compare modes.
Internal and external interrupts, a 12-bit Sigma Delta ADC for voltage and temperature measure-
ments, a high resolution Sigma Delta ADC for Coulomb Counting and instantaneous current
measurements, integrated cell balancing FETs, Additional Secure Authentication Features, an
autonomous Battery Protection module, a programmable Watchdog Timer with internal Oscilla-
tor, and software selectable power saving modes.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
The device is manufactured using Atmel’s high voltage high density non-volatile memory tech-
nology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System,
through an SPI serial interface, by a conventional non-volatile memory programmer or by an On-
chip Boot program running on the AVR core. The Boot program can use any interface to down-
load the application program in the Application Flash memory. Software in the Boot Flash
section will continue to run while the Application Flash section is updated, providing true Read-
While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable-
Flash and highly accurate analog front-end in a monolithic chip.
The Atmel ATmega16HVB/32HVB is a powerful microcontroller that provides a highly flexible
and cost effective solution. It is part of the AVR Battery Management family that provides secure
authentication, highly accurate monitoring and autonomous protection for Lithium-ion battery
cells.
The ATmega16HVB/32HVB AVR is supported with a full suite of program and system develop-
ment tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, and On-
chip Debugger.
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