ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 213

• Manufacturer Part Number: ATAVRSB202
• Description: KIT BATT MGMT FOR ATMEGA32HVB
• Manufacturer: Atmel

Specifications of ATAVRSB202

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8042B–AVR–06/10
2. Wait for at least 20 ms and enable serial programming by sending the Programming
3. The serial programming instructions will not work if the communication is out of synchro-
4. The Flash is programmed one page at a time. The memory page is loaded one byte at a
5. A: The EEPROM array is programmed one byte at a time by supplying the address and
6. Any memory location can be verified by using the Read instruction which returns the con-
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
Table 30-11. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Symbol
t
t
t
t
WD_FLASH
WD_EEPROM
WD_ERASE
WD_FUSE
RESET must be given a positive pulse of at least two CPU clock cycles duration after
SCK has been set to “0”.
Enable serial instruction to pin MOSI.
nization. When in sync. the second byte (0x53), will echo back when issuing the third
byte of the Programming Enable instruction. Whether the echo is correct or not, all four
bytes of the instruction must be transmitted. If the 0x53 did not echo back, give RESET a
positive pulse and issue a new Programming Enable command.
time by supplying the 5 LSB of the address and data together with the Load Program
memory Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program memory
Page is stored by loading the Write Program memory Page instruction with the 6 MSB of
the address. If polling (RDY/BSY) is not used, the user must wait at least t
issuing the next page. (See
before the Flash write operation completes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is first
automatically erased before new data is written. If polling (RDY/BSY) is not used, the
user must wait at least t
chip erased device, no 0xFFs in the data file(s) need to be programmed.
B: The EEPROM array is programmed one page at a time. The Memory page is loaded
one byte at a time by supplying the 2 LSB of the address and data together with the Load
EEPROM Memory Page instruction. The EEPROM Memory Page is stored by loading
the Write EEPROM Memory Page Instruction with the 6 MSB of the address. When using
EEPROM page access only byte locations loaded with the Load EEPROM Memory Page
instruction is altered. The remaining locations remain unchanged. If polling (RDY/BSY) is
not used, the used must wait at least t
30-8 on page
programmed.
tent at the selected address at serial output MISO.
operation.
Set RESET to “1”.
Turn V
CC
power off.
211). In a chip erased device, no 0xFF in the data file(s) need to be
WD_EEPROM
Table
30-11.) Accessing the serial programming interface
before issuing the next byte. (See
WD_EEPROM
before issuing the next page (See
ATmega16HVB/32HVB
Minimum Wait Delay
4.5 ms
4.0 ms
4.0 ms
4.5 ms
Table
WD_FLASH
30-11.) In a
before
Table
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