ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 259
ATAVRSB202
Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Specifications of ATAVRSB202
Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Notes:
8042B–AVR–06/10
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis-
should never be written.
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
ters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega16HVB/32HVB is a
complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the
IN and OUT instructions. For the Extended I/O space from $60 - $FF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
OSICSR
Name
PORTC
PORTB
PORTA
PCIFR
TIFR1
TIFR0
DDRB
DDRA
PINC
PINB
PINA
PORTB7
Bit 7
PINB7
DDB7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTB6
Bit 6
PINB6
DDB6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTC5
PORTB5
Bit 5
PINB5
DDB5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
OSISEL0
PORTC4
PORTB4
Bit 4
PINC4
PINB4
DDB4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTC3
PORTB3
PORTA3
PINC3
Bit 3
PINB3
PINA3
DDB3
DDA3
ICF1
ICF0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTC2
PORTB2
PORTA2
OCF1B
OCF0B
PINC2
Bit 2
PINB2
PINA2
DDB2
DDA2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ATmega16HVB/32HVB
PORTC1
PORTB1
PORTA1
OCF1A
OCF0A
OSIST
PINC1
Bit 1
PCIF1
PINB1
PINA1
DDB1
DDA1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTC0
PORTB0
PORTA0
OSIEN
Bit 0
PCIF0
PINC0
PINB0
PINA0
TOV1
TOV0
DDB0
DDA0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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