ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 25

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ATAVRSB202

Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Datasheets

Specifications of ATAVRSB202

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9. System Clock and Clock Options
9.1
9.1.1
9.1.2
9.1.3
8042B–AVR–06/10
Clock Systems and their Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
I/O
Figure 9-1
need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes, as described in
ment and Sleep Modes” on page
Figure 9-1.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules. The I/O clock is also used by the Exter-
nal Interrupt module, but note that some external interrupts are detected by asynchronous logic,
allowing such interrupts to be detected even if the I/O clock is halted.
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
CPU
FLASH
Oscillator
Oscillator Sampling
Slow RC
Interface
presents the principal clock systems in the AVR and their distribution. All of the clocks
Coulomb Counter
Clock Distribution
ADC
1/4
clk
CCADC
Watchdog Timer
TWI Disconnect
35. The clock systems are detailed below.
delay
CORE
CPU
Battery Protection
Ultra Low Power
RC Oscillator
clk
CPU
RAM
ATmega16HVB/32HVB
Reset Logic
FLASH and
EEPROM
clk
FLASH
Clock Control
System Clock
Oscillator
Prescaler
Fast RC
AVR
Prescaler
VADC
clk
VADC
Voltage
ADC
”Power Manage-
clk
Other I/O
Modules
I/O
25

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