EVB9311 SMSC, EVB9311 Datasheet - Page 152

• Manufacturer Part Number: EVB9311
• Description: EVALUATION BOARD LAN9311-NU
• Manufacturer: SMSC
• Series: 0133r

Specifications of EVB9311

• Main Purpose: Interface, Ethernet
• Embedded: No
• Utilized Ic / Part: LAN9311
• Primary Attributes: 2 Ports, 100BASE-TX/10BASE-T, Managed
• Secondary Attributes: 2 PHYs with HP Auto-MDIX, Auto- Flow Control, 32-bit CRC, MDI/MDI-X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1076

Revision 1.7 (06-29-10)
10.2.4.2
10.2.4.3
10.2.4.3.1
10.2.4.4
10.2.4.4.1
BYTE/BIT
Byte 10
Byte 11
Byte 8
Byte 9
EEPROM Valid Flag
Following the release of nRST, POR, DIGITAL_RST, or a RELOAD command, the EEPROM Loader
starts by reading the first byte of data from the EEPROM. If the value of A5h is not read from the first
byte, the EEPROM Loader will load the current configuration strap values into the PHY registers (see
Section
Register
EEPROM.
MAC Address
The next six bytes in the EEPROM, after the EEPROM Valid Flag, are written into the
Address High Register (HMAC_ADDRH)
the
Address Low Register
address registers in the order specified in
page 120
While the EEPROM Loader is in the wait state, if a Host MAC reset is detected (via the Soft Reset bit
in the
0 value is A5h, the EEPROM Loader will read bytes 1 through 6 from the EEPROM and reload the
Host MAC Address High Register (HMAC_ADDRH)
(HMAC_ADDRL). During this time, the EPC_BUSY bit in the
(E2P_CMD)
Note: The switch MAC address registers are not reloaded due to this condition.
Soft-Straps
The 7
byte has a value of A5h, the next 4 bytes of data (8-11) are written into the configuration strap registers
per the assignments detailed in
(they are still read to maintain the data burst, but are discarded). However, the current configuration
strap values are still loaded into the PHY registers (see
"Configuration Straps," on page 40
straps.
Some PHY register defaults are based on configuration straps. In order to maintain consistency
between the updated configuration strap registers and the PHY registers, the
Negotiation Advertisement Register
(PHY_SPECIAL_MODES_x), and
written when the EEPROM Loader is run.
HOST MAC ADDRESS RELOAD
PHY REGISTERS SYNCHRONIZATION
BP_EN_
BP_EN_
strap_1
strap_2
Switch Fabric MAC Address High Register (SWITCH_MAC_ADDRH)
LED_fun_strap[1:0]
7
th
Hardware Configuration Register
byte of data to be read from the EEPROM is the Configuration Strap Values Valid Flag. If this
10.2.4.4.1) and then terminate, clearing the EPC_BUSY bit in the
(E2P_CMD). Otherwise, the EEPROM Loader will continue reading sequential bytes from the
for additional information on MAC address loading.
is set.
FD_FC_
FD_FC_
strap_1
strap_2
6
Table 10.8 EEPROM Configuration Bits
(SWITCH_MAC_ADDRL). The EEPROM bytes are written into the MAC
FC_strap_1
FC_strap_2
strap_mii
manual_
manual_
BP_EN_
5
Table
Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)
DATASHEET
for more information on the LAN9311/LAN9311i configuration
10.8. If the flag byte is not A5h, these next 4 bytes are skipped
manual_mdix
manual_mdix
(HW_CFG)), the EEPROM Loader will read byte 0. If the byte
(PHY_AN_ADV_x),
strap_mii
_strap_1
_strap_2
FD_FC_
and
152
Table
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
4
LED_en_strap[7:0]
Host MAC Address Low Register
10.7. Refer to
auto_mdix_
auto_mdix_
manual_FC
_strap_mii
strap_1
strap_2
3
Section
and
Port x PHY Special Modes Register
Section 9.6, "Host MAC Address," on
Host MAC Address Low Register
strap_mii
10.2.4.4.1). Refer to
speed_
strap_1
speed_
strap_2
speed_
2
EEPROM Command Register
and
duplex_pol_
SMSC LAN9311/LAN9311i
strap_mii
duplex_
duplex_
strap_1
strap_2
(HMAC_ADDRL), and
EEPROM Command
1
Switch Fabric MAC
Port x PHY Auto-
Section 4.2.4,
disable_strap
SQE_test_
Host MAC
autoneg_
autoneg_
strap_1
strap_2
Datasheet
_mii
0
are