EVB9311 SMSC, EVB9311 Datasheet - Page 111

EVALUATION BOARD LAN9311-NU

EVB9311

Manufacturer Part Number
EVB9311
Description
EVALUATION BOARD LAN9311-NU
Manufacturer
SMSC
Series
0133r
Datasheet

Specifications of EVB9311

Main Purpose
Interface, Ethernet
Embedded
No
Utilized Ic / Part
LAN9311
Primary Attributes
2 Ports, 100BASE-TX/10BASE-T, Managed
Secondary Attributes
2 PHYs with HP Auto-MDIX, Auto- Flow Control, 32-bit CRC, MDI/MDI-X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1076
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
8.5.8
D[15:0] (INPUT)
PIO Writes
PIO writes are used for all LAN9311/LAN9311i write cycles. PIO writes can be performed using Chip
Select (nCS) or Write Enable (nWR). A PIO write cycle begins when both nCS and nWR are asserted.
The cycle ends when either or both nCS and nWR are de-asserted. Either or both of these control
signals must de-assert between cycles for the period specified in
Values,” on page
control signals must be de-asserted between cycles for the period specified. The PIO write cycle is
illustrated in the functional timing diagram in
The END_SEL signal has the same timing characteristics as the address lines.
Please refer to
for PIO write operations.
nCS, nWR
END_SEL
A[x:1]
Figure 8.7 Functional Timing for PIO Write Operation
Section 15.5.8, "PIO Write Cycle Timing," on page 451
451. They may be asserted and de-asserted in any order. Either or both of these
DATASHEET
111
Figure
VALID
VALID
8.7.
VALID
Table 15.12, “PIO Write Cycle Timing
for the AC timing specifications
Revision 1.7 (06-29-10)

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