LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 89

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

Register: 0x40
Capability ID
Read Only
CID
Register: 0x41
Next Item Pointer
Read Only
NIP
Register: 0x42
Power Management Capabilities
Read Only
This register applies to the LSI53C875E only and indicates the power
management capabilities.
Configuration Registers
15
0
7
0
7
0
PMES[4:0]
0
0
0
0
0
Cap_ID
This register indicates the type of data structure currently
being used. It is set to 0x01, indicating the Power
Management Data Structure. Only the LSI53C875E sets
this register to 0x01.
Next_Item_Ptr
Bits [7:0] contain the offset location of the next item in the
controller capabilities list. The default value for this
register is 0x00, indicating that power management is the
last capability in the linked list of extended capabilities.
This register applies to the LSI53C875E only.
11
0
D2S D1S
10
0
0
0
9
0
8
0
0
0
CID
NIP
R
0
6
0
0
0
DSI APS PMEC
5
0
0
0
4
0
3
0
0
0
2
1
VER[2:0]
1
0
1
0
0
[7:0]
[7:0]
3-25
0
1