LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 180

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LSI53C875

Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet

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5-64
Register: 0x48 (0xC8)
SCSI Timer Zero (STIME0)
Read/Write
HTH
SCSI Operating Registers
7
0
0
HTH[3:0]
Handshake-to-Handshake Timer Period
These bits select the handshake-to-handshake time-out
period, the maximum time between SCSI handshakes
(SREQ/ to SREQ/ in target mode, or SACK/ to SACK/ in
initiator mode). When this timing is exceeded, an interrupt
is generated and the HTH bit in the
One (SIST1)
time-out periods for the Handshake-to-Handshake Timer,
the Selection/Reselection Timer (bits [3:0]), and the
General Purpose Timer
bits [3:0]. For a more detailed explanation of interrupts,
refer to
0
Chapter 2, “Functional Description.”
register is set. The following table contains
4
0
(SCSI Timer One
3
0
0
SCSI Interrupt Status
SEL[3:0]
(STIME1),
0
0
0
[7:4]

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