LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 230

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

6.6.1 Read/Write System Memory from SCRIPTS
6-34
The
(DSA)
Move. However, the contents of the
register are preserved.
IT[2:0]
R
NF
TC[23:0]
By using the Memory Move instruction, single or multiple register values
are transferred to or from system memory.
Because the LSI53C875 responds to addresses as defined in the
Address Zero (I/O)
accessed during a Memory Move operation if the source or destination
address decodes to within the chip’s register space. If this occurs, the
register indicated by the lower seven bits of the address is taken as the
data source or destination. In this way, register values are saved to
system memory and later restored, and SCRIPTS can make decisions
based on data values in system memory.
Instruction Set of the I/O Processor
DMA SCRIPTS Pointer Save (DSPS)
Note:
registers are additional holding registers used during the Memory
This bit has no effect unless the Prefetch Enable bit in the
DMA Control (DCNTL)
SCRIPTS instruction prefetching, see
tional Description.”
Instruction Type - Memory Move
Reserved
These bits are reserved and must be zero. If any of these
bits are set, an illegal instruction interrupt occurs.
No Flush
When this bit is set, the LSI53C875 performs a Memory
Move without flushing the prefetch unit. When this bit is
clear, the Memory Move instruction automatically flushes
the prefetch unit. Use the No Flush option if the source
and destination are not within four instructions of the
current Memory Move instruction.
Transfer Count
The number of bytes to be transferred is stored in the
lower 24 bits of the first instruction word.
or
Base Address One (Memory)
Data Structure Address (DSA)
register is set. For information on
and
Data Structure Address
Chapter 2, “Func-
registers, it can be
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[28:25]
[23:0]
Base
24