LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 150

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

5-34
DIP
Register: 0x18 (0x98)
Chip Test Zero (CTEST0)
Read/Write
FMT
SCSI Operating Registers
7
1
1
To determine exactly which condition(s) caused the
interrupt, read the
and
DMA Interrupt Pending
This status bit is set when an interrupt condition is
detected in the DMA portion of the LSI53C875. The
following conditions cause a DMA interrupt to occur:
To determine exactly which condition(s) caused the
interrupt, read the
Byte Empty in DMA FIFO
This was a general purpose read/write register in
previous LSI53C8XX family chips. Although it is still a
read/write register, LSI Logic reserves the right to use
these bits for future LSI53C8XX family enhancements.
The LSI53C875 is reselected
A SCSI gross error occurs
An unexpected disconnect occurs
A SCSI reset occurs
A parity error is detected
The handshake-to-handshake timer is expired
The general purpose timer is expired
A PCI parity error is detected
A bus fault is detected
An abort condition is detected
A SCRIPTS instruction is executed in single step
mode
A SCRIPTS interrupt instruction is executed
An illegal instruction is detected
SCSI Interrupt Status One (SIST1)
1
1
SCSI Interrupt Status Zero (SIST0)
DMA Status (DSTAT)
FMT
1
1
registers.
register.
1
0
1
[7:0]
0