LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 213

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

I/O Instruction
Wait Reselect Instruction
If the LSI53C875 is selected before being reselected, it
fetches the next instruction from the address pointed to
by the 32-bit jump address field stored in the
Address (DNAD)
to Target mode when it is selected.
If the LSI53C875 is reselected, it fetches the next
instruction from the address pointed to by the
SCRIPTS Pointer (DSP)
If the CPU sets the SIGP bit in the
(ISTAT)
instruction and fetches the next instruction from the
address pointed to by the 32-bit jump address field stored
in the
Set Instruction
When the SACK/ or SATN/ bits are set, the
corresponding bits in the
(SOCL)
corresponding bit in the
register is also set. When the carry bit is set, the
corresponding bit in the ALU is set.
Clear Instruction
When the SACK/ or SATN/ bits are cleared, the
corresponding bits are cleared in the
trol Latch (SOCL)
the corresponding bit in the
register is cleared. When the carry bit is cleared, the
corresponding bit in the ALU is cleared.
Relative Addressing Mode
When this bit is set, the 24-bit signed value in the
Next Address (DNAD)
displacement from the current
(DSP)
Select, Reselect, Wait Select, and Wait Reselect
instructions. The Select and Reselect instructions can
contain an absolute alternate jump address or a relative
transfer address.
Table Indirect Mode
When this bit is set, the 24-bit signed value in the
Byte Counter (DBC)
DMA Next Address (DNAD)
address. Use this bit only in conjunction with the
register, the LSI53C875 aborts the Wait Reselect
register are set. When the target bit is set, the
register. Manually set the LSI53C825A
register. When the target bit is cleared,
register is added to the value in the
register is used as a relative
SCSI Control Zero (SCNTL0)
register.
SCSI Output Control Latch
SCSI Control Zero (SCNTL0)
DMA SCRIPTS Pointer
register.
Interrupt Status
SCSI Output Con-
DMA Next
DMA
DMA
DMA
6-17
26
25