LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 101

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LSI53C875

Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet

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Figure 4.5
Arbitration
Reporting
Interface
Address
System
Control
Error
Data
and
LSI53C875 Functional Signal Grouping
Figure 4.5
CLK
RST
AD[31:0]
C_BE[3:0]/
PAR
FRAME/
TRDY/
IRDY/
STOP/
DEVSEL/
IDSEL
REQ/
GNT/
PERR/
SERR/
is the functional signal grouping for the LSI53C875.
LSI53C875
GPIO1_MASTER/
MAC/_TESTOUT
GPIO0_FETCH/
GPIO2_MAS2/
SDIRP[1:0]
DIFFSENS
SDIR[15:0]
MAD[7:0]
SDP[1:0]
BIG_LIT/
SD[15:0]
TESTIN/
RSTDIR
BSYDIR
SELDIR
SCTRL
GPIO3
MAS0/
MAS1/
MWE/
SCLK
MOE/
MCE/
TGS
IRQ/
IGS
SCSI
Additional
Interface
External
Memory
Memory
Interface
4-9

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