LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 105

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

Table 4.6
Table 4.7
Name
IRDY/
STOP/
DEVSEL/
IDSEL
Name
REQ/
GNT/
LSI53C875JB
LSI53C875N,
LSI53C875J,
LSI53C875,
147/190/D6
148/191/E6
Pin No.
LSI53C875JB
LSI53C875N,
LSI53C875J,
LSI53C875,
Interface Control Signals (Cont.)
Arbitration Signals
22/28/G4
20/26/G2
17/23/F1
Pin No.
2/7/B1
Table 4.7
Typ
O
e
I
S/T/S Initiator Ready indicates the initiating agent’s (bus master’s)
S/T/S Stop indicates that the selected target is requesting the master
S/T/S Device Select indicates that the driving device has decoded its
Type
I
Description
Request indicates to the system arbiter that this agent desires use of
the PCI bus. This is a point-to-point signal. Every master has its own
REQ/ signal.
Grant indicates to the agent that access to the PCI bus has been
granted. This is a point-to-point signal. Every master has its own
GNT/ signal.
describes the Arbitration Signals group.
Description
ability to complete the current data phase of the transaction.
IRDY/ is used with TRDY/. A data phase is completed on any
clock when both IRDY/ and TRDY/ are sampled asserted. During
a write, IRDY/ indicates that valid data is present on AD[31:0].
During a read, it indicates that the master is prepared to accept
data. Wait cycles are inserted until both IRDY/ and TRDY/ are
asserted together.
to stop the current transaction.
address as the target of the current access. As an input, it
indicates to a master whether any device on the bus has been
selected.
Initialization Device Select is used as a chip select in place of
the upper 24 address lines during configuration read and write
transactions.
4-13