LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 126

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

5-10
SLPMD
SLPHBEN
WSS
VUE0
SCSI Operating Registers
odd byte boundary, the LSI53C875 stores the last byte in
the
receive operation, or in the
(SODL)
combined with the first byte from the subsequent transfer
so that a wide transfer is completed.
For more information, see
Moves,”
SLPAR Mode Bit
If this bit is cleared, the
register functions like the LSI53C825. If this bit is set, the
SCSI Longitudinal Parity (SLPAR)
high or low byte of the SLPAR word, depending on the
state of
a seed value to be written to the
(SLPAR)
SLPAR High Byte Enable
If this bit is cleared, the low byte of the SLPAR word is
present in the
If this bit is set, the high byte of the SLPAR word is
present in the
Wide SCSI Send
When read, this bit returns the value of the Wide SCSI
Send (WSS) flag. Asserting this bit clears the WSS flag.
This clearing function is self-clearing.
When the WSS flag is high following a wide SCSI send
operation, the SCSI core is holding a byte of “chain” data
in the
becomes the first low-order byte sent when married with
a high-order byte during a subsequent data send transfer.
Performing a SCSI receive operation clears this bit. Also,
performing any nonwide transfer clears this bit.
Vendor Unique Enhancements Bit 0
This bit is a read only value indicating whether the group
code field in the SCSI instruction is standard or vendor
unique. If cleared, the bit indicates standard group codes;
if set, the bit indicates vendor unique group codes. The
value in this bit is reloaded at the beginning of all
asynchronous target receives. The default for this bit is
reset.
SCSI Wide Residue (SWIDE)
SCSI Output Data Latch (SODL)
SCSI Control Two (SCNTL2),
register during a send operation. This byte is
in
register.
Chapter 2, “Functional Description.”
SCSI Longitudinal Parity (SLPAR)
SCSI Longitudinal Parity (SLPAR)
SCSI Longitudinal Parity (SLPAR)
Section 2.5.14, “Chained Block
SCSI Output Data Latch
SCSI Longitudinal Parity
register during a
register reflects the
bit 4. It also allows
register. This data
register.
register.
5
4
3
2