LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 31

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

updates are required, a 7406 (high voltage open collector inverter), an
MTD4P05, and several passive components are also needed. The
memory size and speed is determined by pull-down resistors on the
8-bit bidirectional memory bus at power-up. The LSI53C875 senses this
bus shortly after the release of the Reset signal and configures the ROM
Base Address register and the memory cycle state machines for the
appropriate conditions.
The external memory interface works with a variety of ROM sizes and
speeds. An example set of interface drawings is in
Memory Interface Diagram Examples.”
The LSI53C875 supports a variety of sizes and speeds of expansion
ROM, using pull-down resistors on the MAD[3:0] pins. The encoding of
pins MAD[3:1] allows the user to define how much external memory is
available to the LSI53C875.
associated with the possible values of MAD[3:1]. The MAD[3:1] pins are
fully defined in
Table 2.1
To use one of the configurations mentioned above in a host adapter
board design, put 4.7 k
corresponding to the available memory space. For example, to connect
to a 32 Kbytes external ROM, use pull-downs on MAD[3] and MAD[2]. If
the external memory interface is not used, then no external resistors are
External Memory Interface
MAD[3:1]
000
001
010
011
100
101
110
111
External Memory Support
Chapter 4, “Signal Descriptions.”
Available Memory Space
16 Kbytes
32 Kbytes
64 Kbytes
128 Kbytes
256 Kbytes
512 Kbytes
1024 Kbytes
No external memory present
pull-down resistors on the MAD pins
Table 2.1
shows the memory space
Appendix B, “External
2-7