LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 186

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LSI53C875

Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet

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Register: 0x4B (0xCB)
Response ID One (RESPID1)
Read/Write
RESPID1
Register: 0x4C (0xCC)
SCSI Test Zero (STEST0)
Read Only
SSAID
SCSI Operating Registers
15
7
0
x
0
x
Response ID One
RESPID0 and RESPID1 contain the selection or
reselection IDs. In other words, these two 8-bit registers
contain the ID that the chip responds to on the SCSI bus.
Each bit represents one possible ID with the most
significant bit of RESPID1 representing ID 15 and the
least significant bit of RESPID0 representing ID 0. The
SCSI Chip ID (SCID)
used during arbitration. The chip can respond to more
than one ID because more than one bit can be set in the
Response ID One (RESPID1)
(RESPID0)
only one ID value in the
SCSI Selected As ID
These bits contain the encoded value of the SCSI ID that
the LSI53C875 is selected or reselected as during a
SCSI selection or reselection phase. These bits are read
only and contain the encoded value of 0–15 possible IDs
that are used to select the LSI53C875. During a SCSI
selection or reselection phase, when a valid ID has been
put on the bus, and the LSI53C875 responds to that ID,
the “selected as” ID is written into these bits. These bits
are used with the RESPID registers to allow response to
multiple IDs on the bus.
SSAID
0
x
registers. However, the chip can arbitrate with
4
0
x
ID
register still contains the chip ID
SLT
3
0
x
SCSI Chip ID (SCID)
and
ART
2
x
x
Response ID Zero
SOZ
1
1
x
register.
SOM
[15:8]
0
1
8
x
[7:4]

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