LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 309

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

byte offset counter
cache line size enable
chained mode
chip revision level
chip type
clear DMA FIFO
clear SCSI FIFO
clock address incrementor
clock byte counter
clock conversion factor
configured as I/O
configured as memory
connected
data acknowledge status
data request status
data transfer direction
dataRD
dataWR
destination I/O memory enable
disable halt on parity error or ATN
disable single initiator response
DMA direction
DMA FIFO
DMA FIFO empty
DMA FIFO size
DMA interrupt pending
enable parity checking
enable read line
enable read multiple
enable response to reselection
enable response to selection
enable wide SCSI
encoded chip SCSI ID, bits [3:0]
encoded destination SCSI ID
extend SREQ/SACK filtering
extra clock cycle of data setup
fetch enable
fetch pin mode
FIFO byte control
FIFO flags
flush DMA FIFO
function complete
general purpose timer expired
general purpose timer period
general purpose timer scale factor
GPIO enable
GPIO[4:0]
halt SCSI clock
handshake-to-handshake timer bus activity enable
handshake-to-handshake timer expired
handshake-to-handshake timer period
high impedance mode
illegal instruction detected
immediate arbitration
interrupt-on-the-fly
IRQ disable
IRQ mode
last disconnect
latched SCSI parity
latched SCSI parity for SD[15:8]
lost arbitration
LSI53C700 family compatibility
manual start mode
master control for set or reset pulses
master data parity error
master enable
5-62
5-62
5-62
5-19
5-7
5-52
5-27
5-43
5-52
5-63
5-63
,
5-9
5-42
5-27
5-63
5-38
5-30
,
5-76
5-33
5-42
5-49
5-37
5-37
5-76
5-30
5-36
5-41
5-54
5-23
5-37
5-12
5-33
5-42
5-39
5-49
5-37
5-28
5-49
5-8
5-35
,
5-40
5-51
5-36
5-5
5-34
5-13
,
5-24
Index
5-57
5-37
5-43
5-24
5-42
,
5-74
5-14
5-18
5-68
5-56
5-50
,
5-6
5-53
5-48
5-14
5-76
5-30
5-14
5-50
,
5-66
5-7
,
5-22
5-59
5-42
5-64
5-56
,
5-59
5-66
master parity error enable
max SCSI synchronous offset
parity error
phase mismatch
pointer SCRIPTS
prefetch enable
prefetch flush
reselected
reset SCSI offset
SACK/ status
SATN/ status
SBSY/ status
SC_D/ status
SCLK
SCLK doubler enable bit
SCLK doubler select bit
scratchA/B operation
SCRIPTS
SCRIPTS interrupt instruction received
SCSI C_D/ signal
SCSI control enable
SCSI data high impedance
SCSI differential mode
SCSI disconnect unexpected
SCSI FIFO test read
SCSI FIFO test write
SCSI gross error
SCSI high impedance mode
SCSI I_O/ signal
SCSI interrupt pending
SCSI isolation mode
SCSI loopback mode
SCSI low level mode
SCSI MSG/ signal
SCSI parity error
SCSI phase mismatch - initiator mode
SCSI reset condition
SCSI RST/ received
SCSI RST/ signal
SCSI SDP0/ parity signal
SCSI SDP1 signal
SCSI selected as ID
SCSI synchronous offset maximum
SCSI synchronous offset zero
SCSI synchronous transfer period
SCSI true end of process
SCSI valid
select with SATN/ on a start sequence
selected
selection or reselection time-out
selection response logic test
selection time-out
semaphore
shadow register test mode
SI_O/ status
SIDL least significant byte full
SIDL most significant byte full
signal process
single step interrupt
single step mode
SLPAR high byte enable
SLPAR mode
SMSG/ status
SODL least significant byte full
SODL most significant byte full
SODR least significant byte full
5-72
5-54
5-62
5-54
5-22
5-58
5-32
5-23
,
5-22
5-22
5-23
5-51
5-22
5-10
5-23
5-32
,
5-57
5-51
5-57
5-57
5-54
5-28
5-55
5-62
5-73
5-51
5-28
5-27
5-65
5-28
5-30
,
5-24
5-73
5-58
5-72
5-70
5-55
5-36
5-75
5-77
5-36
5-74
5-74
,
5-73
5-33
5-57
5-72
,
5-72
5-10
5-27
5-36
5-41
5-50
5-40
5-40
5-74
5-71
5-9
5-26
5-17
5-71
5-29
5-26
5-29
5-26
5-56
5-15
5-71
,
5-54
5-59
5-24
5-4
,
5-50
IX-5