LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 292

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

Table 7.28
7-56
Notes: Transfer period bits (bits [7:5] in the
Symbol
t
t
t
t
t
t
t
t
1
2
1
2
3
4
5
6
Extra Clock Cycle of Data Setup bit (bit 7 in
SCSI, set the TolerANT Enable bit (bit 7 in
transfers, the value of the Extend REQ/ ACK Filtering bit
no effect.
Parameter
Send SREQ/ or SACK/ assertion pulse width
Send SREQ/ or SACK/ deassertion pulse width
Receive SREQ/ or SACK/ assertion pulse width
Receive SREQ/ or SACK/ deassertion pulse width
Send data setup to SREQ/ or SACK/ asserted
Send data hold from SREQ/ or SACK/ asserted
Receive data setup to SREQ/ or SACK/ asserted
Receive data hold from SREQ/ or SACK/ asserted
Ultra SCSI SE Transfers 20.0 Mbytes/s (8-Bit Transfers) or 40.0 Mbytes/s
(16-Bit Transfers), 80 MHz Clock
Instruction Set of the I/O Processor
SCSI Transfer (SXFER)
SCSI Test Three
SCSI Control One
(SCSI Test Two
register) are set to zero and the
(STEST3)). During Ultra SCSI
Min
16
17
16
10
10
12
(SCNTL1)) is set. For Fast
0
6
(STEST2), bit 1) has
Max
–
–
–
–
–
–
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns